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When the first process is executed, where do the outgoing registers come from? To solve this problem, we define the following operation 26 3 A Simple Kernel HalfContextSwitch ∆HARDWARE ΞPTAB inproc? ) for every register that must be used by the process inproc?. Finally, it is assumed that when a context switch is to occur, an interrupt is raised. On many processors, when an interrupt is raised, the program counter of the interrupting process is stored on the stack. On other processors, the program counter is stored in a well-defined location, usually in a designated register (as it is on MIPS processors).

To solve this problem, we define the following operation 26 3 A Simple Kernel HalfContextSwitch ∆HARDWARE ΞPTAB inproc? ) for every register that must be used by the process inproc?. Finally, it is assumed that when a context switch is to occur, an interrupt is raised. On many processors, when an interrupt is raised, the program counter of the interrupting process is stored on the stack. On other processors, the program counter is stored in a well-defined location, usually in a designated register (as it is on MIPS processors).

Theorem 1. ∀ PTAB ; PTAB 1 • PTAB 1Init ∧ AbsPTAB 1 ⇒ PTABInit. Proof. By the predicate of AbsPTAB 1, dom freech = PID \ used . The universally quantified formula in PTAB 1Init’s predicate implies that maxpid ∈ dom freech and for all p < maxpid , p ∈ dom freech . This implies that PID = dom freech , so, by the abstraction relation, used = ∅. ✷ Until the end of this section, refinement proofs are presented, two for each operation that is refined. The proofs are the standard ones (cf. [12] or [13]).

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